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Monday 8:30am - 5pm Tuesday 8:30am - 5pm Wednesday 8:30am - 5pm Thursday 8:30am - 5pm Friday 8:30am - 5pm

BLT - The FPGA Experts

Name: BLT - The FPGA Experts
Address: 9881 Broken Land Parkway, Suite 400, Columbia, MD, 21046, US
Telephone: +18889454691
Price range: Not applicable

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BLT - The FPGA Experts

Our designs are in space, undersea, and everywhere in between.

BLT is an electronics engineering design firm of FPGAs/SoCs, boards, embedded software and systems for commercial, industrial, aerospace & defense, space, and intelligence clients.

06/15/2026

REGISTER: https://bltinc.com/xilinx-training/blt-webinar-series/embedded-development-framework-edf-using-yocto-on-amd-socs/

AMD is moving embedded Linux development from PetaLinux to EDF. Join our webinar to see the workflow in action, learn what this change means for developers using AMD SoCs, and get started with EDF.

06/12/2026

Our team had a great week at in San Jose connecting with AMD leaders, team members, and fellow partners. Lots of great conversations. Lots of ideas. Lots of innovation.

We're excited for what's next!

05/20/2026

Confused about the difference between AMD Vivado and Vitis?

This quick breakdown explains what each tool does and where it fits in the AMD development flow for FPGAs and SoCs: https://bltinc.com/2026/05/20/amd-vivado-vs-vitis-ide/

05/15/2026

The AMD Spartan UltraScale+ is worth a look if you need cost-optimized, power-efficient FPGAs with serious I/O and PCIe Gen4 capability. Our no-cost workshop will highlight the core capabilities of this newer device from AMD and give you a solid feel for what it can do and where it fits with your designs.

REGISTER: https://bltinc.com/xilinx-training-courses/get-to-know-amd-spartan-ultrascale-devices-for-real-world-designs-workshop/

05/14/2026

Yesterday, our Technical Director co-presented an AMD SDR Reference Design at the AMD Signal Processing Working Group in Longmont, CO and tonight we're putting it on display. This solution, built on AMD Versal™ adaptive SoCs, eliminates DSP bottlenecks and accelerates software-defined radio development at the tactical edge.

If you're at AMD Partner Night, stop by our table for a live demo. Come see it in action! 🔊📡

05/08/2026

As an AMD Premier Partner, the BLT Team was proud to showcase our AMD SDR Reference Design demo at the Embedded Computing Summit DC.

We'll be bringing the same demo to the AMD ECS CO and the AMD SPWG next week. Proven capability. Proven partnership.

05/07/2026

Stop rebuilding the same FPGA blocks from scratch on every project. Learn how modular design in Verilog and VHDL lets you write it once and reuse it across many designs. 👉 https://bltinc.com/2026/05/06/modular-design-in-verilog-and-vhdl-how-to-build-reusable-ip/

04/28/2026

Will you be at any of these events? Be sure to catch up with our BLT team.

04/23/2026

If your program can't afford board respins, you need a PCB partner who gets it right the first time.

Our design process is built around smart, application-specific decision-making. We go beyond simple layout to engineer boards that optimize signal integrity, power delivery, thermal performance, and manufacturability. We deliver boards that work right the first time, every time, and always on budget. That's why we're trusted by some of the biggest names in Aerospace & Defense.

Whether you're starting from scratch or optimizing an existing design, BLT can help.

👉 Learn more or book a consult: https://bltinc.com/pcb-design-development/

04/22/2026

Is your FPGA design having timing issues? Timing issues are often tied to utilization. The Vivado Utilization Report helps identify where the problem is. In our latest blog post we'll break it down. READ: https://bltinc.com/2026/04/22/understanding-the-vivado-utilization-report/

Address

9881 Broken Land Parkway, Suite 400
Columbia, MD
21046

Opening Hours

Monday	8:30am - 5pm
Tuesday	8:30am - 5pm
Wednesday	8:30am - 5pm
Thursday	8:30am - 5pm
Friday	8:30am - 5pm

Telephone

+18889454691

Website

https://bltinc.com/

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