Marvell Technology

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Data Center & Cloud | Carrier | Enterprise We believe that infrastructure powers progress. At Marvell, We go all in with you.

That ex*****on is as essential as innovation. That better collaboration builds better technology. Focused and determined, we unite behind your goals as our own. We leverage our unrivaled portfolio of infrastructure technology to identify the best solution for your unique needs. And we sit shoulder-to-shoulder with your teams to build it. Agile in our thinking, and our partnerships, we look for une

xpected connections that deliver a competitive edge and reveal new opportunities. At Marvell, we’re driven by the belief that how we do things matters just as much as what we do. Because, with a foundation built on partnership, anything is possible.

Marvell today introduced Teralynx T100, the industry’s first 102.4 Tbps switch silicon purpose-built for the AI era. Unl...
06/01/2026

Marvell today introduced Teralynx T100, the industry’s first 102.4 Tbps switch silicon purpose-built for the AI era.

Unlike legacy switching platforms designed for traditional enterprise and cloud data centers, the Teralynx T100 was architected from the ground up for AI—enabling the industry’s lowest power consumption and lowest latency at this bandwidth tier to address critical bottlenecks in today’s large AI clusters. The T100 will start sampling to customers beginning this quarter.

Learn more: https://mrvl.co/3Qe0WE7

The COMPUTEX keynote by Marvell Chairman and CEO Matt Murphy is just one day away. His presentation, entitled “The Futur...
05/31/2026

The COMPUTEX keynote by Marvell Chairman and CEO Matt Murphy is just one day away. His presentation, entitled “The Future of AI Scaling Depends on Connectivity,” will be livestreamed on the Marvell website.

Learn more about the keynote and watch it here: https://mrvl.co/4dCO6s7

Co-packaged connectivity is scaling rapidly. Fewer than one million near- and co-packaged ports shipped in 2025; that fi...
05/29/2026

Co-packaged connectivity is scaling rapidly. Fewer than one million near- and co-packaged ports shipped in 2025; that figure is projected to surpass 100 million per year by 2030. Deploying technology at that volume requires standards that ensure interoperability, predictability and flexibility.

The Open CPX MSA, a consortium that includes Marvell, is developing specifications for integrating NPO and CPO technology into switches and servers in scalable, repeatable ways, with support for co-packaged copper as well.

Associate Vice President of Cloud Switch Marketing George Hervey outlines how the standard works, what it means for data center deployment, and why modular, interoperable frameworks are essential to meeting the pace of AI infrastructure buildout. Learn more: https://mrvl.co/4uD9TWn

The next phase of AI scaling will require new approaches to connectivity. As the end-to-end connectivity leader, Marvell...
05/29/2026

The next phase of AI scaling will require new approaches to connectivity.

As the end-to-end connectivity leader, Marvell enables the critical connections in modern AI infrastructure to maximize data movement, from within servers and racks to the networks linking data centers across regions, allowing hyperscalers and cloud providers to deploy AI-optimized systems with unprecedented performance, scale and efficiency.

Chairman and CEO of Marvell, Matt Murphy, will deliver a keynote on this topic at COMPUTEX, entitled “The Future of AI Scaling Depends on Connectivity.” The keynote will also be livestreamed on the Marvell website: https://mrvl.co/4dCO6s7

Copper continues to deliver in dense AI computing environments, and a recent demonstration at OFC 2026 shows how far the...
05/28/2026

Copper continues to deliver in dense AI computing environments, and a recent demonstration at OFC 2026 shows how far the technology has advanced.

Marvell and Luxshare-Tech demonstrated 224G long-range SerDes driving signals across a 2.5-meter CPC-backplane-CPC channel, achieving lane bit error rates of 1e-11 at 4 picojoules per bit. Up to 512 lanes of the technology could be integrated into a 102.4T switch.

SerDes is the foundational building block of high-speed networking, with direct impact on power consumption, latency, bandwidth and total cost of ownership. Lowering power by a single picojoule per bit on a 200G/lane device can reduce system power consumption by up to 100 watts.

Senior Staff Engineer Aatreya Chakravarti details the demonstration and the broader role SerDes plays in scaling AI data center infrastructure: https://mrvl.co/3PP6Tar

PCIe is the world's most widely deployed chip-to-chip interconnect, and its role in AI scale-up networks is growing. Low...
05/26/2026

PCIe is the world's most widely deployed chip-to-chip interconnect, and its role in AI scale-up networks is growing. Low latency and high bandwidth make it well suited for the large, multi-rack clusters at the foundation of modern AI data centers.

Marvell has demonstrated the industry's first 260-lane PCIe 6.0 switch, with 256 lanes of data traffic representing the highest radix available for a PCIe switch. The Marvell Structera S flattens the network topology, eliminating the need for multiple smaller switches and reducing complexity, latency and cost at scale.

Krishna Mallampati and Joe Slember detail the technology and how it fits within the broader Marvell PCIe portfolio: https://mrvl.co/3RpxSKd

Marvell Chairman and CEO Matt Murphy will deliver a keynote at COMPUTEX on June 2, entitled “The Future of AI Scaling De...
05/26/2026

Marvell Chairman and CEO Matt Murphy will deliver a keynote at COMPUTEX on June 2, entitled “The Future of AI Scaling Depends on Connectivity.” The keynote will also be livestreamed on the Marvell website.

In his address, Murphy will discuss the company’s decade-long investment in connectivity and optical technologies, and how Marvell has built the technology, product portfolio and ecosystem partnerships needed to help advance the future of AI infrastructure.

Learn more about the keynote here: https://mrvl.co/3S38x8U

Energy efficiency is becoming a defining constraint in AI infrastructure, for both operating costs and data center power...
05/20/2026

Energy efficiency is becoming a defining constraint in AI infrastructure, for both operating costs and data center power limits. At the same time, scale-up clusters are growing beyond single racks and memory subsystems are struggling to keep pace with workload demands.

Marvell Photonic Fabric technology addresses all three challenges through optical interconnect and system-level design, delivering up to 2x greater energy efficiency compared to copper, sub-200ns XPU-to-XPU latency across distances up to 50 meters, and pod-scale memory sharing across racks.

Senior Director of Product Management Uday Poosarla details the technology and its role within the broader Marvell connectivity portfolio: https://mrvl.co/4u2slrg

As optics migrate from front-panel modules to near-packaged and co-packaged configurations directly alongside compute di...
05/19/2026

As optics migrate from front-panel modules to near-packaged and co-packaged configurations directly alongside compute die, the manufacturing challenge shifts as well. Testing methods designed for low-volume, custom configurations cannot scale to meet the demands of AI infrastructure production.

In a new article, Senior Director of Product and Test Engineering Andrew Yick makes the case for treating optical test as a first-class manufacturing discipline, applying the same shift-left, design-for-test, and ATE-enabled approaches that have governed high-volume semiconductor production for decades.

The core principle: if it cannot be tested like an integrated circuit, it will not scale like one.

Learn more: https://mrvl.co/4nzfWsk

At OFC 2026, Marvell and Luxshare-Tech demonstrated the industry's first hybrid AEC/ACC cable, a new category of data ce...
05/15/2026

At OFC 2026, Marvell and Luxshare-Tech demonstrated the industry's first hybrid AEC/ACC cable, a new category of data center interconnect designed to optimize in-rack copper connectivity for AI infrastructure.

Active electrical cables deliver longer reach; active copper cables offer lower power, latency and cost for shorter runs. The hybrid combines both, achieving 2.5 meters of reach at lower power than a standard AEC, without compromising data integrity.

As the only provider delivering both ACC and AEC silicon solutions at 200G/lane, Marvell is positioned to support the full range of in-rack connectivity requirements as AI infrastructure continues to scale.
Senior Principal Engineer Nicola Bramante details the technology and what it means for data center design flexibility.

Learn more on the Marvell blog: https://mrvl.co/3Rcd9JE

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